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ps3:hypervisor:lv1_gpu_context_attribute:fb_setup [psDevWiki]
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Table of Contents

lv1_gpu_context_attribute:fb_setup (225)

Set the start of the current video page in video memory.

This is a specific operation of the generic operation lv1_gpu_context_attribute(...);

Kernel Call

status = lv1_gpu_context_attribute(ps3fb.context_handle,
			           L1GPU_CONTEXT_ATTRIBUTE_FB_SETUP,
				   xdr_lpar, ps3fb_videomemory.size,
				   GPU_IOIF, 0);

Parameters

Inputs
Register Description
R3 ps3fb.context_handle as allocated by lv1_gpu_context_allocate theoretically.
R4 operation_code - L1GPU_CONTEXT_ATTRIBUTE_FB_SETUP (0×600)
R5 xdr_lpar - Address of command FIFO
R6 ps3fb_videomemory.size - Size of command FIFO
R7 GPU_IOIF = 0x0d000000UL. - GPU address of command FIFO (was: I dont know what this address is. Maybe its the address of the frame buffers in Video memory???)
R8 p4 - 0 - Unknown, seems unused.
Outputs
Register Description
R3 Status - 0 = OK, Other values are unknown, but indicate failure.

Part of patch to move FIFO from start of video memory to end:

 	status = lv1_gpu_context_attribute(ps3fb.context_handle,
 					   L1GPU_CONTEXT_ATTRIBUTE_FB_SETUP,
-					   xdr_lpar, ps3fb_videomemory.size,
-					   GPU_IOIF, 0);
+					   xdr_lpar + ps3fb.xdr_size,
+					   GPU_CMD_BUF_SIZE,
+					   GPU_IOIF + ps3fb.xdr_size, 0);

The memory map used to look like:

Address Description
xdr_lpar FIFO region
xdr_lpar + ??? not used
xdr_lpar + ps3fb_videomemory.size - 2 * frame size frame 2
xdr_lpar + ps3fb_videomemory.size - frame size frame 1
xdr_lpar + ps3fb_videomemory.size END

The memory map of ps3fb now looks like this:

Address Description
xdr_lpar frame 1
xdr_lpar + FB_OFF(1) frame 2
xdr_lpar + FB_OFF(2) not used
xdr_lpar + ps3fb_videomemory.size - GPU_CMD_BUF_SIZE FIFO region
xdr_lpar + ps3fb_videomemory.size END

The FIFO section of the memory range is now not mapped into Linux’s address space.

So, from that change we can see that R5 and R7 are moved by the size of the xdr_size (videomemory_size-GPU_CMD_BUF_SIZE) so both refer to the FIFO buffer in different addressing schemes (probably physical memory address and LPAR address)

More discussion on this is at http://forums.ps2dev.org/viewtopic.php?t=8364

 

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ps3/hypervisor/lv1_gpu_context_attribute/fb_setup.txt · Last modified: 2008/05/15 00:07
 
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