Allocate a GPU Context, that is used by many other lv1_gpu_* calls.
When finished with the context_handle, free it by using lv1_gpu_context_free
status = lv1_gpu_context_allocate(ps3fb.memory_handle, 0, &ps3fb.context_handle, &lpar_dma_control, &lpar_driver_info, &lpar_reports, &lpar_reports_size);
| Inputs | |
|---|---|
| Register | Description |
| R3 | Memory Handle obtained by lv1_gpu_memory_allocate |
| R4 | Flags (see below) |
| Outputs | |
| Register | Description |
| R3 | Status - 0 = OK, Other values are unknown, but indicate failure. |
| R4 | ps3fb.context_handle = handle to the allocated context |
| R5 | lpar_dma_control = the address of the FIFO control registers, unused by Kernel. |
| R5 | lpar_driver_info = the address of a driver information structure (see below) |
| R6 | lpar_reports = the address of the DMA notifiers, unused by Kernel. |
| R7 | lpar_reports_size = the size of the lpar_reports area (see below) |
lpar_driver_info is a Physical Address of a structure on the other side of the Hypervisor. The Kernel uses ioremap to make the physical address accessible by the Kernel. Eg:
ps3fb.dinfo = ioremap(lpar_driver_info, 128 * 1024);
128KB of memory is iomap’d in this way, although the data is given the structure: gpu_driver_info which is much smaller than 128KB. For each call of lv1_gpu_context_allocate, a new gpu_driver_info is allocated at offset 0×4000 from the previous one. This make a total of 8 possible contexts for 128KB, corresponding to the hardware context switching capabilities of the RSX. However, the Kernel only uses one context, so it does not explain why it maps 128KB. (was: What is in the rest of the space???)
lpar_dma_control is the Physical Address of the FIFO control registers. The FIFO is located in system RAM and used to send commands to the RSX. These registers control the pointers of the RSX in the FIFO.
lpar_reports is the Physical Address of the DMA notification zone available to report completion of RSX commands. The lpar_reports_size indicates the size of the lpar_reports structure.
The second parameters is not used by the kernel, but is supposed to contain flags. The following values change the behaviour of the call, other values are unknown:
| Flag | Description |
|---|---|
| 0×04 | create DMA objects 0xfeed0003 (class 0×02) and 0xfeed0004 (class 0x3D) targetting video RAM at offset 0×04000000 size 0×1000 |
| 0×08 | create DMA objects 0×13378080 (class 0×02) and 0×13378086 (class 0x3D) targetting system RAM at address 0x8f03f000 (1st context), 0x9f03f000 (2nd context) size 0×1000 |
Remapping and dumping “lpar_driver_info” on an EU 1.5 firmware PS3 reveals the following information:
| Offset | Field | Hex | Decimal | Comment |
|---|---|---|---|---|
| 0×00 | version_driver | 0×00000211 | (529) | as #defined in ps3fb.c |
| 0×04 | version_gpu | 0x0000000c | (12) | |
| 0×08 | memory_size | 0×00000000 | (0) | |
| 0x0c | hardware_channel | 0×00000001 | (1) | |
| 0×10 | nvcore_frequency | 0x1dcd6500 | (500000000) | 500 MHz |
| 0×14 | memory_frequency | 0x26be3680 | (650000000) | 650 MHz |
| 0×18 | memory_p3 | 0×0000000 | (0) | 4th parameter of lv1_gpu_memory_allocate is reported here |
| 0x1c | memory_p4 | 0×0000000 | (0) | 5th parameter of lv1_gpu_memory_allocate is reported here |
| 0×20 | memory_p1 | 0×0000000 | (0) | 2nd parameter of lv1_gpu_memory_allocate is reported here |
| 0×24 | memory_p2 | 0×0000000 | (0) | 3rd parameter of lv1_gpu_memory_allocate is reported here |
| 0×54 | context_flags | 0×0000000 | (0) | lower 32 bits of 2nd parameter of lv1_gpu_context_allocate is reported here |
Starting at offset 0×58 of lpar_driver_info, we find some RSX object handles:
| Offset | Handle | Description |
|---|---|---|
| 0×58 | 0xfeed0000 | DMA object targetting start of video memory (range seems to depend on the ddr_size parameter of lv1_gpu_memory_allocate) |
| 0x5c | 0xfeed0001 | DMA object for system memory mapped via lv1_gpu_context_iomap |
| 0×60 | 0×00000000 | Null object |
| 0×64 | 0×66606660 | DMA object (class 0x3D) targetting 4kB of video memory at offset 0x0fe00000 (start of lpar_reports region) |
| 0×68 | 0×66616661 | DMA object (class 0×02) targetting 4kB of video memory at offset 0x0fe00000 (start of lpar_reports region) |
| 0x6c | 0×66626660 | DMA object (class 0x3D) targetting 32kB of video memory at offset 0x0fe01400 (offset 0×1400 to lpar_reports region) |
| 0×70 | 0×56616660 | DMA object (class 0x3D) targetting 4kB of video memory at offset 0x0ff10000 (device 8 of lv1_gpu_device_map) |
| 0×74 | 0×56616661 | DMA object (class 0×02) targetting 4kB of video memory at offset 0x0ff10000 (device 8 of lv1_gpu_device_map) |
| 0×458 | 0×00000000 | Null object |
| 0x45c | 0×31337000 | Null object |
| 0×460 | 0×31337303 | Graphic object Memory to Memory for uploading from system memory to video memory |
| 0×464 | 0x3137c0de | Graphic object Memory to Memory for downloading from video memory to system memory |
| 0×468 | 0x31337a73 | Graphic object Swizzled Surface (texture?) |
| 0x46c | 0x313371c3 | Graphic object Context Surfaces 2D, used to specify framebuffer pixel format |
| 0×470 | 0x3137af00 | Graphic object Scaled Image From Memory, used for blitting by lv1_gpu_context_attribute:fb_blit |
| 0×474 | 0×31337808 | Graphic object Image from CPU, used to upload to video memory from FIFO |
| 0×478 | 0xcafebabe | unknown, point to 0xcafebabe too in RAMIN, probably end marker |
| 0×858-0×894 | 0×66604200-0x6660420f | 16 DMA Notifier objects targetting video memory at offset 0x0fe01000-0x0fe013ff (offset 0×1000-0x13ff of lpar_reports region) |
Note that DMA objects created through lv1_gpu_context_allocate flags do not appear in the driver info structure.
The first 2 “display_head” structures contain the following information (the following 6 are filled with zeroes)
| Field | Hex | Decimal |
|---|---|---|
| be_time_stamp | 0×0000000000000000 | (0) |
| status | 0×40000000 | (1073741824) |
| offset | 0×00000000 | (0) |
| res1 | 0×00000000 | (0) |
| res2 | 0×00000000 | (0) |
| field | 0×00000000 | (0) |
| reserved1 | 0×00000001 | (1) |
| res3 | 0×0000000000000000 | (0) |
| raster | 0×00000000 | (0) |
| field_vsync | 0×00000000 | (0) |
| reserved2 | 0×00000000 | (0) |